Xilinx Zynq Design Experts

We are experts with Xilinx Zynq family and all its features.

Xilinx Zynq Design

A2e Technologies is an expert with the Xilinx Zynq FPGA/SOC. We are a Certified Partner with Xilinx and are fully trained on all functions of the device. In addition, we have direct experience porting our H.264 core to the device along with performing many custom designs.

AMP Expertise A2E has the knowledge and experience to get the most out of the dual-core capabilities of the Xilinx Zynq SoC Processing System. One of the benefits of the Zynq SoC is the ability to run separate systems on each core in an Asymmetrical Multi-Processor (AMP) configuration. This allows the designer to dedicate different functionality within the overall system design to each core using the most appropriate processing system for those tasks. Some tasks are better suited for bare-metal applications with a single processing loop and interrupt handling while others need a real-time OS to handle the additional complexity. Other tasks may be more appropriately handled using the benefits of a full-featured operating system like Linux. Running the Zynq in an AMP configuration gives the designer the flexibility of two different processing systems. However, there are technical challenges to overcome in an AMP design including the complications from booting both cores and sharing resources to the use and understanding of the tools.

Sample Projects


Video Recorder with Zynq

Video Recorder with Zynq

  • - A2e H.264 encoder/decoder core
  • - 6 * IP or NTSC cameras
  • - Linux drivers
  • - I/O: SATA drive storage, Gbit Enet, USB 2.0, NTSC CODEC
  • - Zynq All Programmable SoC 7030

H.264 Demo System

H.264 Demo System

  • - Runs on Xilinx ZC702 Eval Board
  • - Zynq 7020 All Programmable SoC
  • - ARM core
  • - DDR controller
  • - DMA
  • - Ethernet MAC
  • - USB
  • - A2e H.264 Encoder Core
  • - HDMI input/output
  • - A2e RTSP Server running on Linux for video streaming

InfraRed Camera

H.264 Demo System

  • - Dual-core FreeRTOS AMP config.
  • - Seperate asynch SW images on each ARM-9
  • - HTTP server with the LwIP stack
  • - Modified Xilnx boot loader to add mirroring and improved realiability
  • - Added FreeRTOS support for Xilinx QSPI BSP driver

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Why Our Designs Are Better


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